A 16-Bit Microprocessor Chip for Cryptographic Operations on Low-Resource Devices

Erich Wenger; Martin Feldhofer; Norbert Felber

A 16-Bit Microprocessor Chip for Cryptographic Operations on Low-Resource Devices

Erich Wenger, Martin Feldhofer, Norbert Felber

Institut für Angewandte Informationsverarbeitung und Kommunikationstechnologie (7050)

Publikation: Beitrag in Buch/Bericht/Konferenzband › Beitrag in einem Konferenzband › Begutachtung

Abstract

Security services in embedded systems and contactless devices (smart cards, RFID tags) get more and more important. In this paper we investigate the design and implementation of a 16-bit general-purpose microprocessor called Neptun. The purpose of this design is to have a platform for the evaluation of the Elliptic Curve Digital Signature Algorithm (ECDSA) using the NIST P-192 parameters. The processor efficiently uses the available chip area and performs an ECDSA signature generation, using only 1405K clock cycles. For a signature verification 2675k clock cycles are required. This fast computation time is possible through the use of a Harvard architecture, a self-designed CPU core and a self-designed instruction set. With the 5K program memory and a clock frequency of 55.5 MHz, the design can also be used as a security-extension for arbitrary devices. In addition to a working prototype chip, we have a full tool chain that includes an instruction-set simulator and an assembler for producing executables.Security services in embedded systems and contactless devices (smart cards, RFID tags) get more and more important. In this paper we investigate the design and implementation of a 16-bit general-purpose microprocessor called Neptun. The purpose of this design is to have a platform for the evaluation of the Elliptic Curve Digital Signature Algorithm (ECDSA) using the NIST P-192 parameters. The processor efficiently uses the available chip area and performs an ECDSA signature generation, using only 1405K clock cycles. For a signature verification 2675k clock cycles are required. This fast computation time is possible through the use of a Harvard architecture, a self-designed CPU core and a self-designed instruction set. With the 5K program memory and a clock frequency of 55.5 MHz, the design can also be used as a security-extension for arbitrary devices. In addition to a working prototype chip, we have a full tool chain that includes an instruction-set simulator and an assembler for producing executables.

Originalsprache	englisch
Titel	Austrochip 2010
Untertitel	Tagungsband : 6. Oktober 2010, Villach
Erscheinungsort	Spittal
Herausgeber (Verlag)	Fachhochschule Kärnten
Seiten	55-60
ISBN (Print)	978-3-200-01945-4
Publikationsstatus	Veröffentlicht - 2010
Veranstaltung	Austrochip 2008: Workshop on Microelectronics - Linz Dauer: 8 Okt. 2008 → 6 Okt. 2010

Konferenz

Konferenz	Austrochip 2008
Ort	Linz
Zeitraum	8/10/08 → 6/10/10

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paperAkzeptiertes Autorenmanuskript, 1,43 MB

PIT - Pirvacy in the Internet of Things
Wenger, E., Feldhofer, M., Hutter, M., Aigner, M. J., Dominikus, S., Posch, K. & Schmidt, J.
1/04/10 → 31/07/12
Projekt: Forschungsprojekt
System on Chip (SOC) Design
Posch, K., Plos, T., Szekely, A., Feldhofer, M., Großschädl, J., Hutter, M., Aigner, M. J., Tillich, S., Wolkerstorfer, J., Popp, T. & Posch, R.
1/01/01 → 1/11/08
Projekt: Arbeitsgebiet
VLSI Design
Medwed, M., Wenger, E., Aigner, M. J., Posch, K., Hutter, M., Kirschbaum, M., Schmidt, J., Posch, R., Dominikus, S., Szekely, A., Feldhofer, M. & Plos, T.
1/01/95 → 15/07/19
Projekt: Arbeitsgebiet

Dieses zitieren

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abstract = "Security services in embedded systems and contactless devices (smart cards, RFID tags) get more and more important. In this paper we investigate the design and implementation of a 16-bit general-purpose microprocessor called Neptun. The purpose of this design is to have a platform for the evaluation of the Elliptic Curve Digital Signature Algorithm (ECDSA) using the NIST P-192 parameters. The processor efficiently uses the available chip area and performs an ECDSA signature generation, using only 1405K clock cycles. For a signature verification 2675k clock cycles are required. This fast computation time is possible through the use of a Harvard architecture, a self-designed CPU core and a self-designed instruction set. With the 5K program memory and a clock frequency of 55.5 MHz, the design can also be used as a security-extension for arbitrary devices. In addition to a working prototype chip, we have a full tool chain that includes an instruction-set simulator and an assembler for producing executables.Security services in embedded systems and contactless devices (smart cards, RFID tags) get more and more important. In this paper we investigate the design and implementation of a 16-bit general-purpose microprocessor called Neptun. The purpose of this design is to have a platform for the evaluation of the Elliptic Curve Digital Signature Algorithm (ECDSA) using the NIST P-192 parameters. The processor efficiently uses the available chip area and performs an ECDSA signature generation, using only 1405K clock cycles. For a signature verification 2675k clock cycles are required. This fast computation time is possible through the use of a Harvard architecture, a self-designed CPU core and a self-designed instruction set. With the 5K program memory and a clock frequency of 55.5 MHz, the design can also be used as a security-extension for arbitrary devices. In addition to a working prototype chip, we have a full tool chain that includes an instruction-set simulator and an assembler for producing executables.",

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N2 - Security services in embedded systems and contactless devices (smart cards, RFID tags) get more and more important. In this paper we investigate the design and implementation of a 16-bit general-purpose microprocessor called Neptun. The purpose of this design is to have a platform for the evaluation of the Elliptic Curve Digital Signature Algorithm (ECDSA) using the NIST P-192 parameters. The processor efficiently uses the available chip area and performs an ECDSA signature generation, using only 1405K clock cycles. For a signature verification 2675k clock cycles are required. This fast computation time is possible through the use of a Harvard architecture, a self-designed CPU core and a self-designed instruction set. With the 5K program memory and a clock frequency of 55.5 MHz, the design can also be used as a security-extension for arbitrary devices. In addition to a working prototype chip, we have a full tool chain that includes an instruction-set simulator and an assembler for producing executables.Security services in embedded systems and contactless devices (smart cards, RFID tags) get more and more important. In this paper we investigate the design and implementation of a 16-bit general-purpose microprocessor called Neptun. The purpose of this design is to have a platform for the evaluation of the Elliptic Curve Digital Signature Algorithm (ECDSA) using the NIST P-192 parameters. The processor efficiently uses the available chip area and performs an ECDSA signature generation, using only 1405K clock cycles. For a signature verification 2675k clock cycles are required. This fast computation time is possible through the use of a Harvard architecture, a self-designed CPU core and a self-designed instruction set. With the 5K program memory and a clock frequency of 55.5 MHz, the design can also be used as a security-extension for arbitrary devices. In addition to a working prototype chip, we have a full tool chain that includes an instruction-set simulator and an assembler for producing executables.

AB - Security services in embedded systems and contactless devices (smart cards, RFID tags) get more and more important. In this paper we investigate the design and implementation of a 16-bit general-purpose microprocessor called Neptun. The purpose of this design is to have a platform for the evaluation of the Elliptic Curve Digital Signature Algorithm (ECDSA) using the NIST P-192 parameters. The processor efficiently uses the available chip area and performs an ECDSA signature generation, using only 1405K clock cycles. For a signature verification 2675k clock cycles are required. This fast computation time is possible through the use of a Harvard architecture, a self-designed CPU core and a self-designed instruction set. With the 5K program memory and a clock frequency of 55.5 MHz, the design can also be used as a security-extension for arbitrary devices. In addition to a working prototype chip, we have a full tool chain that includes an instruction-set simulator and an assembler for producing executables.Security services in embedded systems and contactless devices (smart cards, RFID tags) get more and more important. In this paper we investigate the design and implementation of a 16-bit general-purpose microprocessor called Neptun. The purpose of this design is to have a platform for the evaluation of the Elliptic Curve Digital Signature Algorithm (ECDSA) using the NIST P-192 parameters. The processor efficiently uses the available chip area and performs an ECDSA signature generation, using only 1405K clock cycles. For a signature verification 2675k clock cycles are required. This fast computation time is possible through the use of a Harvard architecture, a self-designed CPU core and a self-designed instruction set. With the 5K program memory and a clock frequency of 55.5 MHz, the design can also be used as a security-extension for arbitrary devices. In addition to a working prototype chip, we have a full tool chain that includes an instruction-set simulator and an assembler for producing executables.

M3 - Conference paper

SN - 978-3-200-01945-4

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EP - 60

BT - Austrochip 2010

PB - Fachhochschule Kärnten

CY - Spittal

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Y2 - 8 October 2008 through 6 October 2010

ER -

A 16-Bit Microprocessor Chip for Cryptographic Operations on Low-Resource Devices

Abstract

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Projekte

PIT - Pirvacy in the Internet of Things

System on Chip (SOC) Design

VLSI Design

Dieses zitieren