Generalized Execution Time Estimation

Andreas Rechberger; Eugen Brenner

doi:10.1109/SIES.2018.8442107

Generalized Execution Time Estimation

Andreas Rechberger, Eugen Brenner

Institut für Technische Informatik (4480)

Publikation: Beitrag in Buch/Bericht/Konferenzband › Beitrag in einem Konferenzband › Begutachtung

Abstract

While developing embedded devices a significant challenge is to choose the appropriate computing architecture. Especially during early design stages providing measurable metric on the performance demands to implement a specified algorithm is required. Usually this includes a large amount of target dependency, like the chosen micro-controller platform. This work aims on providing a generalized method to estimate the processing time of a dedicated algorithm, when being run on a variety of hardware choices. The focus is on a fast exploration of the hardware design space in order to provide guidance for selecting a suitable processing platform.

Originalsprache	englisch
Titel	2018 IEEE 13th International Symposium on Industrial Embedded Systems, SIES 2018 - Proceedings
Herausgeber (Verlag)	Institute of Electrical and Electronics Engineers
ISBN (Print)	9781538641552
DOIs	https://doi.org/10.1109/SIES.2018.8442107
Publikationsstatus	Veröffentlicht - 20 Aug. 2018
Veranstaltung	13th IEEE International Symposium on Industrial Embedded Systems, SIES 2018 - Graz, Österreich Dauer: 6 Juni 2018 → 8 Juni 2018

Konferenz

Konferenz	13th IEEE International Symposium on Industrial Embedded Systems, SIES 2018
Land/Gebiet	Österreich
Ort	Graz
Zeitraum	6/06/18 → 8/06/18

ASJC Scopus subject areas

Angewandte Informatik
Hardware und Architektur
Wirtschaftsingenieurwesen und Fertigungstechnik

Zugriff auf Dokument

10.1109/SIES.2018.8442107

Andere Dateien und Links

http://www.scopus.com/inward/record.url?scp=85053471690&partnerID=8YFLogxK

Dieses zitieren

Rechberger, A & Brenner, E 2018, Generalized Execution Time Estimation. in 2018 IEEE 13th International Symposium on Industrial Embedded Systems, SIES 2018 - Proceedings., 8442107, Institute of Electrical and Electronics Engineers, 13th IEEE International Symposium on Industrial Embedded Systems, SIES 2018, Graz, Österreich, 6/06/18. https://doi.org/10.1109/SIES.2018.8442107

@inproceedings{a7fa4df65f664e75a984b0fd984c6fab,

title = "Generalized Execution Time Estimation",

abstract = "While developing embedded devices a significant challenge is to choose the appropriate computing architecture. Especially during early design stages providing measurable metric on the performance demands to implement a specified algorithm is required. Usually this includes a large amount of target dependency, like the chosen micro-controller platform. This work aims on providing a generalized method to estimate the processing time of a dedicated algorithm, when being run on a variety of hardware choices. The focus is on a fast exploration of the hardware design space in order to provide guidance for selecting a suitable processing platform.",

keywords = "algorithm, compiler, data flow, performance estimation",

author = "Andreas Rechberger and Eugen Brenner",

year = "2018",

month = aug,

day = "20",

doi = "10.1109/SIES.2018.8442107",

language = "English",

isbn = "9781538641552",

booktitle = "2018 IEEE 13th International Symposium on Industrial Embedded Systems, SIES 2018 - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "13th IEEE International Symposium on Industrial Embedded Systems, SIES 2018 ; Conference date: 06-06-2018 Through 08-06-2018",

}

TY - GEN

T1 - Generalized Execution Time Estimation

AU - Rechberger, Andreas

AU - Brenner, Eugen

PY - 2018/8/20

Y1 - 2018/8/20

N2 - While developing embedded devices a significant challenge is to choose the appropriate computing architecture. Especially during early design stages providing measurable metric on the performance demands to implement a specified algorithm is required. Usually this includes a large amount of target dependency, like the chosen micro-controller platform. This work aims on providing a generalized method to estimate the processing time of a dedicated algorithm, when being run on a variety of hardware choices. The focus is on a fast exploration of the hardware design space in order to provide guidance for selecting a suitable processing platform.

AB - While developing embedded devices a significant challenge is to choose the appropriate computing architecture. Especially during early design stages providing measurable metric on the performance demands to implement a specified algorithm is required. Usually this includes a large amount of target dependency, like the chosen micro-controller platform. This work aims on providing a generalized method to estimate the processing time of a dedicated algorithm, when being run on a variety of hardware choices. The focus is on a fast exploration of the hardware design space in order to provide guidance for selecting a suitable processing platform.

KW - algorithm

KW - compiler

KW - data flow

KW - performance estimation

UR - http://www.scopus.com/inward/record.url?scp=85053471690&partnerID=8YFLogxK

U2 - 10.1109/SIES.2018.8442107

DO - 10.1109/SIES.2018.8442107

M3 - Conference paper

AN - SCOPUS:85053471690

SN - 9781538641552

BT - 2018 IEEE 13th International Symposium on Industrial Embedded Systems, SIES 2018 - Proceedings

PB - Institute of Electrical and Electronics Engineers

T2 - 13th IEEE International Symposium on Industrial Embedded Systems, SIES 2018

Y2 - 6 June 2018 through 8 June 2018

ER -

Generalized Execution Time Estimation

Abstract

Konferenz

ASJC Scopus subject areas

Zugriff auf Dokument

Andere Dateien und Links

Fingerprint

Dieses zitieren