Low power, low noise, Charge Sensitive Amplifier in CMOS 0.18 μm technology for the readout of fine pitch pixelated CdTe detector

Our group is currently developing a new project dedicated to the design of new Cd(Zn)Te spectro-imaging systems for future space borne astrophysics missions. The main goal is to build a spectro-imaging system with matrix ASIC hybridized to pixelated Cd(Zn)Te detector with typical pixel of 300 μm pitch and typical energy resolution of 0.5 keV at 60 keV. Before designing a complete matrix of readout channels, we designed a prototype ASIC to evaluate the microelectronic technology in terms of noise and tolerance to radiation. We designed an ASIC in the standard AMS 0.18 μm CMOS technology dedicated to the readout of very low capacitance (<1pF) and very low dark current (<5pA) Cd(Zn)Te detectors. The Caterpylar AMS is a set of 30 low noise low power Charge Sensitive Amplifiers (CSAs). All the CSAs have the same folded cascode architecture, only the type (PMOS or NMOS) and the geometry of the input transistors differ between CSAs. The noise performances of the technology are very good since a minimal ENC of 9 e^- rms has been measured with power consumption in the CSA of 12 μW only. Influence of the W/L ratio and W × L product of input transistor on noise has been measured and discussed. We connected one of the CSA to a silicon diode and measured an energy resolution of 580 eV FWHM at 122 keV with a ⁵⁷Co source and of 470 eV FWHM at 59.5 keV with a ²⁴¹Am source.