Modeling of annular gate MOS transistor

Enclosed layout is an effective way to mitigate radiation induced leakage current in NMOS transistors. The unconventional shape of such device makes modeling a challenging task. Evaluation of equivalent aspect ratio estimation is complicated by additional stress effects, such as STI stress. We incorporate the STI stress effect into simulation for enclosed layout transistor in order to evaluate accuracy of two equivalent aspect ratio evaluation models: the well-known mid-line approximation and the recently introduced isosceles trapezoid approximation