Modular Test System Architecture for Device, Circuit and System Level Reliability Testing

Roland Sleik, Michael Glavanovics, Sascha Einspieler, Annette Mütze, Klaus Krischan

Publikation: Beitrag in Buch/Bericht/KonferenzbandBeitrag in einem KonferenzbandBegutachtung

Abstract

Reliability stress testing of power semiconductors requires significant development effort for a test apparatus to provide the required functionality. This paper presents a modular test system architecture which focuses on flexibility, reusability and adaptability to future test requirements. Different types of tests for different devices in application circuit configuration can be implemented based on the same modular test system concept. Vital parameters of the device under test (DUT) can be acquired in situ during the running stress test. This enables to collect drift data of this parameters. The control and data acquisition parts of the test system are separated from the actual test circuit. With this physical separation, the same control part can be used for different types of tests. Experimental results of a prototype test system are provided.
Originalspracheenglisch
Titel2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
Seiten759-765
DOIs
PublikationsstatusVeröffentlicht - 2016
Veranstaltung31st Annual IEEE Applied Power Electronics Conference and Exposition: APEC 2016 - Long Beach, USA / Vereinigte Staaten
Dauer: 20 März 201624 März 2016

Konferenz

Konferenz31st Annual IEEE Applied Power Electronics Conference and Exposition
Land/GebietUSA / Vereinigte Staaten
OrtLong Beach
Zeitraum20/03/1624/03/16

Fields of Expertise

  • Sonstiges

Treatment code (Nähere Zuordnung)

  • Application

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