Research output per year
Research output per year
Personal profile
Research interests
My research focuses on flexible and reconfigurable FPGA-based microcontroller architectures for embedded systems based on RISC-V. This work involves hardware/software codesign strategies for both processor logic and operating systems.
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Dive into the research topics where Tobias Peter Scheipel is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Advances in Dynamic and Reconfigurable Embedded Systems Design
Scheipel, T., 19 Dec 2022, 216 p.Research output: Thesis › Doctoral Thesis
Open Access -
moreMCU: A Runtime-reconfigurable RISC-V Platform for Sustainable Embedded Systems
Scheipel, T., Angermair, F. & Baunach, M. C., 31 Aug 2022, 25th Euromicro Conference on Digital System Design (DSD). Maspalomas, Spain: EUROMICRO, p. 24-31 8 p.Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review
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SmartOS: An OS Architecture for Sustainable Embedded Systems
Scheipel, T. P., Batista Ribeiro, L., Sagaster, T. & Baunach, M. C., 17 Mar 2022, 2022 - Fruehjahrstreffen FG BS. Gesellschaft für Informatik , 10 p.Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review
Open Access -
A Conversion Concept for a Legacy Software Model towards AUTOSAR Compliance
Sivashanmugam, V., Scheipel, T. P., Baunach, M. C. & Adabala, B., 8 Aug 2021, 1st International Conference on Computing and Applied Engineering. IJCRT - International Journal of Creative Research Thoughts, Vol. 9. 5 p.Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review
Open Access -
A Hardware/Software Concept for Partial Logic Updates of Embedded Soft Processors at Runtime
Scheipel, T. P., Brungs, P. & Baunach, M. C., 1 Sept 2021, 24th Euromicro Conference on Digital System Design (DSD). Palermo, Italy: EUROMICRO, p. 199 9 p.Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review
Activities
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3rd Winter School on Operating Systems
Tobias Peter Scheipel (Participant), Meinhard Kissich (Participant), Vignesh Manjunath (Participant), Muhammad Tanveer Ali Ahmad (Participant), Tim Sagaster (Participant) & Marcel Carsten Baunach (Participant)
3 Apr 2023 → 6 Apr 2023Activity: Participation in or organisation of › Conference or symposium (Participation in/Organisation of)
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Öffentlichkeitsarbeitsgruppe ETIT
Tobias Peter Scheipel (Speaker)
2023 → …Activity: Public engagement › Other
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Öffentlichkeitsarbeitsgruppe ETIT
Tobias Peter Scheipel (Speaker)
2022 → …Activity: Public engagement › Other
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moreMCU: A Runtime-reconfigurable RISC-V Platform for Sustainable Embedded Systems
Tobias Peter Scheipel (Speaker)
31 Aug 2022Activity: Talk or presentation › Talk at conference or symposium › Science to science
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SmartOS: An OS Architecture for Sustainable Embedded Systems
Tobias Peter Scheipel (Speaker), Leandro Batista Ribeiro (Speaker) & Tim Sagaster (Speaker)
17 Mar 2022Activity: Talk or presentation › Talk at conference or symposium › Science to science
Prizes
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Gewinner des Graduiertenwettbewerbs der GI Fachgruppe Echtzeitsysteme
Scheipel, Tobias Peter (Recipient), 16 Nov 2017
Prize: Prizes / Medals / Awards
Projects
- 3 Active
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Embedded Operating Systems
Baunach, M. C., Martins Gomes, R., Batista Ribeiro, L., Malenko, M., Mauroner, F. & Scheipel, T. P.
1/09/15 → …
Project: Research project
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Reconfigurable Processor Architectures
Baunach, M. C., Martins Gomes, R., Batista Ribeiro, L., Malenko, M., Mauroner, F., Scheipel, T. P. & Saikia, A.
1/09/14 → …
Project: Research project
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Embedded Automotive Systems
Baunach, M. C., Batista Ribeiro, L., Martins Gomes, R., Malenko, M., Scheipel, T. P., Saikia, A., Nagarajan, D. & Manjunath, V.
1/09/14 → …
Project: Research area