CD-Laboratory for Nonlinear Signal Processing

  • Vogel, Christian (Co-Investigator (CoI))
  • Köppl, Heinz (Co-Investigator (CoI))
  • Singerl, Peter (Co-Investigator (CoI))
  • Schwingshackl, David (Co-Investigator (CoI))
  • Kubin, Gernot (Principal Investigator (PI))
  • Witrisal, Klaus (Co-Investigator (CoI))
  • Blocher, Thomas (Co-Investigator (CoI))
  • Abd-Elrady, Emad (Co-Investigator (CoI))
  • Krall, Christoph (Co-Investigator (CoI))
  • Mendel, Stefan (Co-Investigator (CoI))
  • Gan, Li (Co-Investigator (CoI))

Project: Research project

Project Details

Description

The Christian Doppler Laboratory for Nonlinear Signal Processing addresses fundamental research questions arising from signal processing applications which are challenging due to their nonlinear aspects. We deliver theoretical analyses, develop and optimize new algorithms and, through their implementation, build awareness for their complexity, robustness, accuracy, and power consumption trade-offs. The Christian Doppler Laboratory for Nonlinear Signal Processing plays a leading role in the solution of signal processing problems where conventional methods fail. By entering into industrial partnerships, it thrives from and supports the bidirectional exchange of know-how and people between nonlinear science and the sweeping digital signal processing revolution.

Modul A: Nonlinear Signal Processing in xDSL Systems

Modul B: Digital Correction of Analog Signal Processing Errors in Fast Analog-to-Digital Converters (ADC)

Modul C: Digital Predistortion of RF-Power Amplifiers for UMTS (Universal Mobile Telecommunications System) Base-Stations
In recent years the rapid growth of the number of users in mobile communication networks led to the development of third generation standards like UMTS. The modulation and the multiple user access methods where designed for high spectral efficiency. This leads to strong fluctuations of the power envelope transmitted by the UMTS Base-Stations and therefore to nonlinear effects caused by power amplifiers. Because these devices are the most cost intensive, it is desirable to operate the amplifiers close to their compression points. The main problem is the pronounced dynamic nonlinear behaviour of the amplifier, combined with fluctuations in the envelope in the transmission signal. Several state-of-the-art methods like Feed-Forward are used in today's power amplifiers, but are expensive hardware items. The goal of this work is the investigation of more flexible and powerful linearization methods called Digital Predistortion. This method aims at inverting the dynamic nonlinearity of the whole transmitter chain in the digital baseband.

Modul D: Digital synthesizers for gigahertz-range fast frequency-hopping systems
High-frequency fast frequency-hopping systems require frequency synthesizers to provide multi-gigahertz clocks with a band switching time on the order of few tens of nanoseconds, posing difficult challenges with respect to noise, sidebands, and power dissipation. Conventional phase-locked loop (PLL)-based synthesizers are simply ill-suited due to the long settling times, which are typically tens of microseconds. Recent research has pushed the development of digital-based low-noise high-frequency synthesizers where the traditional analog forward path is replaced by a digital processing core and the VCO is replaced by a Digitally Controlled Oscillator (DCO). The advantages of such architectures include: friendly implementation in newest digital CMOS technologies, improved testability, robustness against PVT variations, low sensitivity to external noise sources, enhanced programmability. Since the frequency control information is stored in digital form in the loop and the DCO can be switched within few nanoseconds from one frequency to another. There are quite a number of aspects which have to be deeply investigated in a feasibility study. These include: 1. Digital phase detector topologies 2. Digital loop filter topologies 3. DCO architectures 4. Phase noise performance 5. Limit cycles and spurs in the spectrum due to the quantization of the phase information 6. How to assure a virtually zero locking time when switching bands 7. Number of supportable bands 8. Area and power consumption estimation At the moment there are no publications or public documents available which report the implementation of fast frequency-hopping systems with a digital synthesizer. Goal of this Laboratory Module is to investigate in depth the feasibility of a digital approach to the frequency synthesis of fast frequency-hopping systems.

Modul E: Ultra-Wideband (UWB) Communications
Ultra-Wideband (UWB) communications is an emerging new technology for high speed data transmission systems that is expected to enable low-cost and low-power devices. Instead of a modulated carrier, streams of ultra-short pulses (greater than 1ns) are used for wireless data transmission, yielding signals of huge bandwidths (smaller than 1 GHz) but at very low power densities. In principle, the nature of the signal used makes the technology suitable for low-cost implementations in standard CMOS technology. However, before UWB systems can be produced at large scale and low cost, there are numerous open research issues to be solved. Only in recent years, the academic world has started research activities on a broad front, standardization and regulation authorities have become aware of the technology, and joint task-groups have been founded in the European Union and in the US. Previous experience with UWB technologies exists from military applications like UWB (time-domain, impulse) radar systems. Still research at fundamental and applied levels is needed at large scale to make cheap and power-efficient UWB chips available. In our research, we plan to go beyond the state-of-the-art in several areas related to the transceiver architecture and signal processing. Due to the extremely large bandwidth, which prevents direct sampling of the received signal at sufficient accuracy, it is expected that a straight-forward downscaling of signal processing algorithms for conventional receivers will not lead to practical solutions for UWB devices. That is, new algorithms for channel estimation, synchronization, multi-user detection, and other typical receiver tasks have to be developed for UWB devices. This includes the derivation of appropriate system models including the modeling of the multi-path radio channel as observed through antenna arrays. The following items will receive special attention: * Research on UWB channel models which include the multi-input/multi- output case * Research on UWB transceiver algorithms including adaptive antenna array algorithms and fading prediction * Optimization of transceiver algorithms for efficient hardware implementation

Modul F: Digital synthesizers for gigahertz-range fast frequency-hopping systems (Phase-Locked-Loop - PLL)
StatusFinished
Effective start/end date1/04/0231/03/09

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