The goal of the project is the digital correction of analog signal processing errors in fast analog-to-digital converters. Through this digital correction of errors, costs for production of fast converters should be limited and a more flexible adaption of new technologies will be allowed. An analog-to-digital converter is a complex system that causes dynamic, nonlinear, and time-variant errors. In order to determine analog signal processing errors typical high-speed architectures are investigated. The aim of the investigations is the systematic identification of these architectures and their influence on the ideal signal conversion. Identification is achieved through theoretical descriptions, simulation models and measurements of real converters. For all identified systems algorithms will be developed which improve the properties of the converter. These algorithms will be evaluated according to performance and practical applicability.