A Class-D Amplifier with Digital PWM and Digital Loop-Filter using a Mixed-Signal Feedback Loop

Mario Auer; Timucin David Karaca

doi:10.1109/ESSCIRC.2019.8902785

A Class-D Amplifier with Digital PWM and Digital Loop-Filter using a Mixed-Signal Feedback Loop

Mario Auer, Timucin David Karaca

Institute of Electronics (4390)

Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review

Abstract

A digital class-D audio amplifier is presented that is based on digital pulse-width modulation (PWM) and a com- bination of digital and analog feedback. Unlike other recent im- plementations for low-power applications this amplifier directly accepts digital input as the digital-to-analog conversion is an inherent feature of the presented topology.
The feedback topology uses a hybrid scheme with digital feedback to improve the performance of the PWM and analog- feedback to mitigate analog imperfections and to improve power supply rejection. Because of the proposed feedback scheme, the requirements on the analog-to-digital converter (ADC) in the feedback loop are greatly relaxed allowing the use of a continuous-time ∆Σ-modulator.
The class-D amplifier was realized in a standard 180nm CMOS technologies and drives 1.2W into an 8Ω load and achieves a total harmonic distortion plus noise (THD+N) of −96dB, a signal-to-noise ration (SNR) of 99.9dB having an efficiency of 91%.

Original language	English
Title of host publication	ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)
Publisher	Institute of Electrical and Electronics Engineers
Pages	153-156
Number of pages	4
ISBN (Electronic)	978-1-7281-1550-4
DOIs	https://doi.org/10.1109/ESSCIRC.2019.8902785
Publication status	Published - Nov 2019
Event	49th European Solid-State Circuits Conference: ESSCIRC 2019 - Duration: 23 Sept 2019 → 26 Sept 2019 https://esscirc-essderc2019.org/

Conference

Conference	49th European Solid-State Circuits Conference
Abbreviated title	ESSCIRC
Period	23/09/19 → 26/09/19
Internet address	https://esscirc-essderc2019.org/

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10.1109/ESSCIRC.2019.8902785

Cite this

A Class-D Amplifier with Digital PWM and Digital Loop-Filter using a Mixed-Signal Feedback Loop. / Auer, Mario; Karaca, Timucin David.
ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC). Institute of Electrical and Electronics Engineers, 2019. p. 153-156.

Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review

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abstract = "A digital class-D audio amplifier is presented that is based on digital pulse-width modulation (PWM) and a com- bination of digital and analog feedback. Unlike other recent im- plementations for low-power applications this amplifier directly accepts digital input as the digital-to-analog conversion is an inherent feature of the presented topology.The feedback topology uses a hybrid scheme with digital feedback to improve the performance of the PWM and analog- feedback to mitigate analog imperfections and to improve power supply rejection. Because of the proposed feedback scheme, the requirements on the analog-to-digital converter (ADC) in the feedback loop are greatly relaxed allowing the use of a continuous-time ∆Σ-modulator.The class-D amplifier was realized in a standard 180nm CMOS technologies and drives 1.2W into an 8Ω load and achieves a total harmonic distortion plus noise (THD+N) of −96dB, a signal-to-noise ration (SNR) of 99.9dB having an efficiency of 91%.",

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N2 - A digital class-D audio amplifier is presented that is based on digital pulse-width modulation (PWM) and a com- bination of digital and analog feedback. Unlike other recent im- plementations for low-power applications this amplifier directly accepts digital input as the digital-to-analog conversion is an inherent feature of the presented topology.The feedback topology uses a hybrid scheme with digital feedback to improve the performance of the PWM and analog- feedback to mitigate analog imperfections and to improve power supply rejection. Because of the proposed feedback scheme, the requirements on the analog-to-digital converter (ADC) in the feedback loop are greatly relaxed allowing the use of a continuous-time ∆Σ-modulator.The class-D amplifier was realized in a standard 180nm CMOS technologies and drives 1.2W into an 8Ω load and achieves a total harmonic distortion plus noise (THD+N) of −96dB, a signal-to-noise ration (SNR) of 99.9dB having an efficiency of 91%.

AB - A digital class-D audio amplifier is presented that is based on digital pulse-width modulation (PWM) and a com- bination of digital and analog feedback. Unlike other recent im- plementations for low-power applications this amplifier directly accepts digital input as the digital-to-analog conversion is an inherent feature of the presented topology.The feedback topology uses a hybrid scheme with digital feedback to improve the performance of the PWM and analog- feedback to mitigate analog imperfections and to improve power supply rejection. Because of the proposed feedback scheme, the requirements on the analog-to-digital converter (ADC) in the feedback loop are greatly relaxed allowing the use of a continuous-time ∆Σ-modulator.The class-D amplifier was realized in a standard 180nm CMOS technologies and drives 1.2W into an 8Ω load and achieves a total harmonic distortion plus noise (THD+N) of −96dB, a signal-to-noise ration (SNR) of 99.9dB having an efficiency of 91%.

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BT - ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)

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T2 - 49th European Solid-State Circuits Conference

Y2 - 23 September 2019 through 26 September 2019

ER -

A Class-D Amplifier with Digital PWM and Digital Loop-Filter using a Mixed-Signal Feedback Loop

Abstract

Conference

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