A Low-Power Bit-Serial Multiplier for Finite Fields GF(2m)

Johann Großschädl

Research output: Chapter in Book/Report/Conference proceedingConference paperpeer-review

Original languageEnglish
Title of host publicationProceedings of the 34th IEEE International Symposium on Circuits and Systems (ISCAS 2001)
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
PagesIV-37-IV-40
ISBN (Print)0-7803-6685-9
DOIs
Publication statusPublished - 2001
EventIEEE International Symposium on Circuits and Systems: ISCAS 2001 - Sydney, Australia
Duration: 6 May 20019 May 2001

Conference

ConferenceIEEE International Symposium on Circuits and Systems
Abbreviated titleISCAS
Country/TerritoryAustralia
CitySydney
Period6/05/019/05/01

Treatment code (Nähere Zuordnung)

  • Application
  • Experimental
  • VLSI Design

    Medwed, M., Wenger, E., Aigner, M. J., Posch, K., Hutter, M., Kirschbaum, M., Schmidt, J., Posch, R., Dominikus, S., Szekely, A., Feldhofer, M. & Plos, T.

    1/01/9515/07/19

    Project: Research area

Cite this