Analysis of current sharing in large and small-signal IC pin models

Benjamin Orr, Pratik Maheshwari, David Pommerenke, Harald Gossner, Wolfgang Stadler

Research output: Chapter in Book/Report/Conference proceedingConference paperpeer-review


A comprehensive model of a clock line including large and small signal pin parameters, as well as channel parameters is presented. The small signal model allows analysis of in-band interference which can lead to soft failures, while large signal models allow for the simulation of current sharing between driver/receiver pin pairs.

Original languageEnglish
Title of host publicationElectrical Overstress/Electrostatic Discharge Symposium Proceedings
Publication statusPublished - 26 Nov 2014
Externally publishedYes
Event36th Annual Electrical Overstress/Electrostatic Discharge Symposium: EOS/ESD 2014 - Tucson, United States
Duration: 7 Sept 201412 Sept 2014


Conference36th Annual Electrical Overstress/Electrostatic Discharge Symposium
Abbreviated titleEOS/ESD 2014
Country/TerritoryUnited States

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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