Abstract
To reduce electromagnetic emissions in AM band, harmonic suppression techniques are implemented on the IC level. Literature on harmonic suppression techniques like Digital Harmonic Cancellation and Selective Harmonic Elimination are available in abundance. These techniques are generally employed in low frequency domain (50 Hz line inverters). However, power efficiency (PE) of these techniques in the classical definition of PE has not been the focus so far. PE becomes especially important when these techniques are used for applications demanding high power levels at the output. This paper presents a comparison of some important harmonic suppression techniques to reduce electromagnetic emissions and their effects on PE.
Original language | English |
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Title of host publication | EMC COMPO 2019 - 2019 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 272-274 |
Number of pages | 3 |
ISBN (Electronic) | 9781728142616 |
DOIs | |
Publication status | Published - 1 Oct 2019 |
Event | 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits: EMC COMPO 2019 - Haining, Hangzhou, China Duration: 21 Oct 2019 → 23 Oct 2019 |
Conference
Conference | 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits |
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Abbreviated title | EMC COMPO 2019 |
Country/Territory | China |
City | Haining, Hangzhou |
Period | 21/10/19 → 23/10/19 |
Keywords
- Electromagnetic Emission
- Harmonic Cancellation
- Linearity
- Power Amplifiers
- Power Efficiency
ASJC Scopus subject areas
- Instrumentation
- Electrical and Electronic Engineering
- Safety, Risk, Reliability and Quality
- Radiation