Configurable gate driver for a stress test bench of newly developed discrete silicon power devices

Konstantinos Patmanidis*, Tobias Kist, Michael Glavanovics, Annette Muetze

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review


Stress test system development is increasingly aimed at meticulous reliability and robustness evaluation for power semiconductors under application conditions as well as qualification purposes. Newly developed silicon (Si) power devices need further investigation in terms of potential new failure mechanisms. A double pulse tester is utilized as a test vehicle for studying hard switching related failure modes. However, setting up such a repetitive reliability test for multiple channels requires substantial manual labour. This paper proposes an open loop current source gate driver (CSGD) with adjustable gate voltage which can be software programmed, enabling an operator to set variable turn on/off speeds without hand-operated switching speed adjustment by gate resistors. The CSGD performance is assessed with various hard switching speeds in experiment and simulation for a discrete TO-247 MOSFET and IGBT respectively. Finally, additional considerations are proposed for faster switching so as to overcome the inherent nonlinearities and the CSGD output impedance effects.

Original languageEnglish
Article number114283
JournalMicroelectronics Reliability
Publication statusPublished - Sep 2021


  • Current source gate driver
  • Double pulse tester
  • Output impedance
  • Software programmed

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Condensed Matter Physics
  • Safety, Risk, Reliability and Quality
  • Surfaces, Coatings and Films
  • Electrical and Electronic Engineering


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