CrypTag: Thwarting Physical and Logical Memory Vulnerabilities using Cryptographically Colored Memory

Pascal Nasahl, Robert Schilling, Mario Werner, Jan Hoogerbrugge, Marcel Medwed, Stefan Mangard

Research output: Chapter in Book/Report/Conference proceedingConference paperpeer-review


Memory vulnerabilities are a major threat to many computing systems.
To effectively thwart spatial and temporal memory vulnerabilities, full logical memory safety is required.
However, current mitigation techniques for memory safety are either too expensive or trade security against efficiency.
One promising attempt to detect memory safety vulnerabilities in hardware is memory coloring, a security policy deployed on top of tagged memory architectures.
However, due to the memory storage and bandwidth overhead of large tags, commodity tagged memory architectures usually only provide small tag sizes, thus limiting their use for security applications.

Irrespective of logical memory safety, physical memory safety is a necessity in hostile environments prevalent for modern cloud computing and IoT devices.
Architectures from Intel and AMD already implement transparent memory encryption to maintain confidentiality and integrity of all off-chip data.
Surprisingly, the combination of both, logical and physical memory safety, has not yet been extensively studied in previous research, and a naive combination of both security strategies would accumulate both overheads.

In this paper, we propose CrypTag, an efficient hardware/software co-design mitigating a large class of logical memory safety issues and providing full physical memory safety.
At its core, CrypTag utilizes a transparent memory encryption engine not only for physical memory safety, but also for memory coloring at hardly any additional costs.
The design avoids any overhead for tag storage by embedding memory colors in the upper bits of a pointer and using these bits as an additional input for the memory encryption.
A custom compiler extension automatically leverages CrypTag to detect logical memory safety issues for commodity programs and is fully backward compatible.

For evaluating the design, we extended a RISC-V processor with memory encryption with CrypTag.
Furthermore, we developed a LLVM-based toolchain automatically protecting all dynamic, local, and global data.
Our evaluation shows a hardware overhead of less than 1% and an average runtime overhead between 1.5% and 6.1% for thwarting logical memory safety vulnerabilities on a system already featuring memory encryption.
Enhancing a system with memory encryption typically induces a runtime overhead between 5% and 109.8% for commercial and open-source encryption units.
Original languageEnglish
Title of host publicationASIA CCS '21: Proceedings of the 2021 ACM Asia Conference on Computer and Communications Security
PublisherAssociation of Computing Machinery
ISBN (Electronic)978-1-4503-8287-8
Publication statusPublished - May 2021
Event2021 ACM Asia Conference on Computer and Communications Security - Virtuell, China
Duration: 7 Jun 202111 Jun 2021


Conference2021 ACM Asia Conference on Computer and Communications Security
Abbreviated titleACM ASIACCS 2021
Internet address


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