Abstract
A method for calculating the peak voltage at the input of the IC is presented for an I/O port subsystem consisting of a TVS protection device, an IC on-chip protection and a PCB trace. The method is valid for non-snapback on-chip protection where the silicon part can be fully described by a quasistatic (VF)-TLP curve and allows to determine the peak voltage from measurement data of the individual components only.
Original language | English |
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Title of host publication | Electrical Overstress/Electrostatic Discharge 2022, EOS/ESD 2022 - Symposium Proceedings |
Publisher | ESD Association |
ISBN (Electronic) | 9781585373406 |
Publication status | Published - 2022 |
Event | 44th Annual Electrical Overstress/Electrostatic Discharge Symposium: EOS/ESD 2022 - Reno, United States Duration: 18 Sept 2022 → 23 Sept 2022 |
Conference
Conference | 44th Annual Electrical Overstress/Electrostatic Discharge Symposium |
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Country/Territory | United States |
City | Reno |
Period | 18/09/22 → 23/09/22 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering