Efficient Vector Implementations of AES-based Designs: A Case Study and New Implementations for Grøstl

Severin Holzer-Graf, Thomas Krinninger, Martin Andreas Pernull, Martin Schläffer, Peter Schwabe, David Seywald, Wolfgang Wieser

Research output: Chapter in Book/Report/Conference proceedingConference paperpeer-review

Abstract

In this paper we evaluate and improve different vector implementation techniques of AES-based designs. We analyze how well the T-table, bitsliced and bytesliced implementation techniques apply to the SHA-3 finalist Grøstl. We present a number of new Grøstl implementations that improve upon many previous results. For example, our fastest ARM NEON implementation of Grøstl is 40% faster than the previously fastest ARM implementation. We present the first Intel AVX2 implementations of Grøstl, which require 40% less instructions than previous implementations. Furthermore, we present ARM Cortex-M0 implementations of Grøstl that improve the speed by 55% or the memory requirements by 15%.
Original languageEnglish
Title of host publicationCryptographers' Track at the RSA Conference 2013, CT-RSA 2013x^x
Pages145-161
DOIs
Publication statusPublished - 2013
EventCryptographers' Track at the RSA Conference 2013: CT-RSA 2013 - San Francisco, United States
Duration: 25 Feb 20131 Mar 2013

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
VolumeLNCS 7779
ISSN (Print)1611-3349

Conference

ConferenceCryptographers' Track at the RSA Conference 2013
Country/TerritoryUnited States
CitySan Francisco
Period25/02/131/03/13

Fields of Expertise

  • Information, Communication & Computing

Treatment code (Nähere Zuordnung)

  • Application

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