FAULTLESS: Flexible and Transparent Fault Protection for Superscalar RISC-V Processors

Moritz Waser; David Schrammel; Robert Schilling; Stefan Mangard

FAULTLESS: Flexible and Transparent Fault Protection for Superscalar RISC-V Processors

Moritz Waser^*, David Schrammel, Robert Schilling, Stefan Mangard

^*Corresponding author for this work

Institute of Information Security (7050)

Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review

Original language	English
Title of host publication	22nd International Conference on Detection of Intrusions and Malware, and Vulnerability Assessment, DIMVA 2025
Publication status	Published - 2025
Event	22nd International Conference on Detection of Intrusions and Malware, and Vulnerability Assess, DIMVA 2025 - Graz University of Technology, Graz, Austria Duration: 9 Jul 2025 → 11 Jul 2025

Conference

Conference	22nd International Conference on Detection of Intrusions and Malware, and Vulnerability Assess, DIMVA 2025
Country/Territory	Austria
City	Graz
Period	9/07/25 → 11/07/25

AWARE - Hardware-Ensured Software Security
Mangard, S. (Co-Investigator (CoI))
1/05/22 → 30/04/25
Project: Research project

Cite this

Waser, M, Schrammel, D, Schilling, R & Mangard, S 2025, FAULTLESS: Flexible and Transparent Fault Protection for Superscalar RISC-V Processors. in 22nd International Conference on Detection of Intrusions and Malware, and Vulnerability Assessment, DIMVA 2025. 22nd International Conference on Detection of Intrusions and Malware, and Vulnerability Assess, DIMVA 2025, Graz, Austria, 9/07/25.

@inproceedings{53cd185a45c842a3bc6652bdac9fa615,

title = "FAULTLESS: Flexible and Transparent Fault Protection for Superscalar RISC-V Processors",

author = "Moritz Waser and David Schrammel and Robert Schilling and Stefan Mangard",

year = "2025",

language = "English",

booktitle = "22nd International Conference on Detection of Intrusions and Malware, and Vulnerability Assessment, DIMVA 2025",

note = "22nd International Conference on Detection of Intrusions and Malware, and Vulnerability Assess, DIMVA 2025 ; Conference date: 09-07-2025 Through 11-07-2025",

}

TY - GEN

T1 - FAULTLESS: Flexible and Transparent Fault Protection for Superscalar RISC-V Processors

AU - Waser, Moritz

AU - Schrammel, David

AU - Schilling, Robert

AU - Mangard, Stefan

PY - 2025

Y1 - 2025

M3 - Conference paper

BT - 22nd International Conference on Detection of Intrusions and Malware, and Vulnerability Assessment, DIMVA 2025

T2 - 22nd International Conference on Detection of Intrusions and Malware, and Vulnerability Assess, DIMVA 2025

Y2 - 9 July 2025 through 11 July 2025

ER -

FAULTLESS: Flexible and Transparent Fault Protection for Superscalar RISC-V Processors

Conference

Projects

AWARE - Hardware-Ensured Software Security

Cite this