Implementation Aspects of the DPA-Resistant Logic Style MDPL

Thomas Popp, Stefan Mangard

Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review

Original languageEnglish
Title of host publicationIEEE International Symposium on Circuits and Systems
Publisher.
Pages2913-2916
ISBN (Print)0-7803-9390-2
Publication statusPublished - 2006
EventIEEE International Symposium on Circuits and Systems: ISCAS 2006 - Island of Kos, Greece
Duration: 21 May 2006 → 24 May 2006

Conference

ConferenceIEEE International Symposium on Circuits and Systems
Abbreviated titleISCAS
Country/TerritoryGreece
CityIsland of Kos
Period21/05/06 → 24/05/06

Other files and links

  • EU - SCARD - Side Channel Analysis Resistant Design Flow

    Mangard, S., Herbst, C., Wolkerstorfer, J., Oswald, M. E., Popp, T., Tillich, S., Aigner, M. J. & Schmaranz, K.

    1/01/04 → 30/06/06

    Project: Research project

  • IMPA Lab

    Posch, R., Rijmen, V., Posch, K., Kirschbaum, M., Schmidt, J., Schläffer, M., Szekely, A., Medwed, M., Plos, T., Peßl, P., Aigner, M. J., Wenger, E., Dominikus, S., Feldhofer, M., Hutter, M. & Oswald, M. E.

    1/10/99 → 15/07/19

    Project: Research area

  • VLSI Design

    Medwed, M., Wenger, E., Aigner, M. J., Posch, K., Hutter, M., Kirschbaum, M., Schmidt, J., Posch, R., Dominikus, S., Szekely, A., Feldhofer, M. & Plos, T.

    1/01/95 → 15/07/19

    Project: Research area

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