Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors

Stefan Tillich; Johann Großschädl

doi:10.1007/11894063_22

Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors

Stefan Tillich, Johann Großschädl

Institute of Applied Information Processing and Communications (7050)

Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review

Original language	English
Title of host publication	Cryptographic Hardware and Embedded Systems — CHES 2006
Editors	Louis Goubin, Mitsuru Matsui
Place of Publication	Berlin
Publisher	Springer Verlag
Pages	270-284
Volume	4249
ISBN (Print)	978-3-540-46559-1
DOIs	https://doi.org/10.1007/11894063_22
Publication status	Published - 2006
Event	CHES - Yokohama, Japan Duration: 10 Oct 2006 → 13 Oct 2006

Publication series

Name	Lecture Notes in Computer Science
Publisher	Springer Verlag

Conference

Conference	CHES
Country/Territory	Japan
City	Yokohama
Period	10/10/06 → 13/10/06

Treatment code (Nähere Zuordnung)

Application
Experimental

Access to Document

10.1007/11894063_22

CHES2006_ISE.pdfFinal published version, 199 KB

Cite this

Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors. / Tillich, Stefan; Großschädl, Johann.
Cryptographic Hardware and Embedded Systems — CHES 2006. ed. / Louis Goubin; Mitsuru Matsui. Vol. 4249 Berlin: Springer Verlag, 2006. p. 270-284 (Lecture Notes in Computer Science).

Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review

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AU - Großschädl, Johann

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U2 - 10.1007/11894063_22

DO - 10.1007/11894063_22

M3 - Conference paper

SN - 978-3-540-46559-1

VL - 4249

T3 - Lecture Notes in Computer Science

SP - 270

EP - 284

BT - Cryptographic Hardware and Embedded Systems — CHES 2006

A2 - Goubin, Louis

A2 - Matsui, Mitsuru

PB - Springer Verlag

CY - Berlin

T2 - CHES

Y2 - 10 October 2006 through 13 October 2006

ER -

Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors

Publication series

Conference

Treatment code (Nähere Zuordnung)

Access to Document

Other files and links

ECRYPT - EU-eCrypt FP6 NoE - Network of Excellence in Cryptology

Instruction Set Extensions and Architectural Enhancements for Public-Key Cryptography on General-Purpose RISC Processors

VLSI Design

Cite this

Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors

Publication series

Conference

Treatment code (Nähere Zuordnung)

Access to Document

Other files and links

Projects

ECRYPT - EU-eCrypt FP6 NoE - Network of Excellence in Cryptology

Instruction Set Extensions and Architectural Enhancements for Public-Key Cryptography on General-Purpose RISC Processors

VLSI Design

Cite this