Investigation of the ESD induced clock disturbances in portable electronic products

Viswa Pilla, Pratik Maheshwari, Tianqi Li, David J. Pommerenke, Junji Maeshima, Hideki Shumiya, Takashi Yamada, Kenji Araki

Research output: Chapter in Book/Report/Conference proceedingConference paperpeer-review


ESD events can induce noise on the system clock which may lead to soft-errors in the portable electronic products. This paper presents measurement techniques to investigate the ESD induced clock disturbances. At first, the soft-errors due to system level ESD testing on a DUT are shown. Next, local field scanning and direct injection are performed to identify ESD sensitive areas/traces. Techniques for soft-error threshold measurement using synchronized noise injection techniques are shown. Short time FFT (STFFT) based spectrogram method to investigate the PLL output frequency deviation due to the clock line noise, is presented.

Original languageEnglish
Title of host publicationProceedings - 2013 IEEE International Symposium on Electromagnetic Compatibility, EMC 2013
Number of pages5
Publication statusPublished - 1 Dec 2013
Externally publishedYes
Event2013 IEEE International Symposium on Electromagnetic Compatibility: EMC 2013 - Denver, United States
Duration: 5 Aug 20139 Aug 2013

Publication series

NameIEEE International Symposium on Electromagnetic Compatibility
ISSN (Print)1077-4076
ISSN (Electronic)2158-1118


Conference2013 IEEE International Symposium on Electromagnetic Compatibility
Country/TerritoryUnited States

ASJC Scopus subject areas

  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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