Self-aligned open-loop multiphase generator

Michael Kalcher, Daniel Gruber

Research output: Chapter in Book/Report/Conference proceedingConference paperpeer-review

Abstract

An open-loop feedback-less CMOS multiphase generator circuit architecture is presented. The principle generates n 360/n-spaced outputs from a single-ended input LO or clock at the very same frequency. The phase accuracy of the implemented circuit employing the principle, relies on the matching of delays and weighted linear phase interpolation. The presented circuit is designed in a 28 nm bulk-CMOS technology covering an operating frequency range from 1.5 GHz up to 2.5 GHz. Simulation results of the designed multiphase generator show a worst case phase noise performance of −151 dBc/Hz at 100 MHz offset with a typical power consumption of only 3.5 mW from a 0.95 V supply at 2 GHz, demonstrating the feasibility of the presented circuit architecture.

Original languageEnglish
Title of host publication2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers
ISBN (Electronic)9781728103976
DOIs
Publication statusPublished - 1 Jan 2019
EventIEEE International Symposium on Circuits and Systems: ISCAS 2019 - Sapporo, Japan
Duration: 26 May 201929 May 2019

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2019-May
ISSN (Print)0271-4310

Conference

ConferenceIEEE International Symposium on Circuits and Systems
Country/TerritoryJapan
CitySapporo
Period26/05/1929/05/19

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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