System-on-Chip Design From Requirements to ASIC: Open-Source, Optimized, and Human-out-of-the-Loop

^*Corresponding author for this work

Research output: Contribution to conference › Poster

Original language	English
Publication status	Unpublished - 13 Apr 2023
Event	DissertantInnenseminar Informations- und Kommunikationstechnik (SS 2023) - Bildungshaus Retzhof , Wagna, Austria Duration: 12 Apr 2023 → 14 Apr 2023

Seminar	DissertantInnenseminar Informations- und Kommunikationstechnik (SS 2023)
Country/Territory	Austria
City	Wagna
Period	12/04/23 → 14/04/23

Keywords

@conference{ee576c8ff09d47c8a3855d984afafaa4,

title = "System-on-Chip Design From Requirements to ASIC: Open-Source, Optimized, and Human-out-of-the-Loop",

keywords = "system-on-chip, ASIC design, open source, EDA, FPGA",

author = "Meinhard Kissich and Baunach, {Marcel Carsten}",

year = "2023",

month = apr,

day = "13",

language = "English",

note = "DissertantInnenseminar Informations- und Kommunikationstechnik (SS 2023) ; Conference date: 12-04-2023 Through 14-04-2023",

}

TY - CONF

T1 - System-on-Chip Design From Requirements to ASIC: Open-Source, Optimized, and Human-out-of-the-Loop

AU - Kissich, Meinhard

AU - Baunach, Marcel Carsten

PY - 2023/4/13

Y1 - 2023/4/13

KW - system-on-chip

KW - ASIC design

KW - open source

KW - EDA

KW - FPGA

M3 - Poster

T2 - DissertantInnenseminar Informations- und Kommunikationstechnik (SS 2023)

Y2 - 12 April 2023 through 14 April 2023

ER -