A Generic Timing Mechanism for Using the APPLES Gate-Level Accelerator in a Mixed-level Simulation Environment

Alexander Maili; Damian Dalton; Christian Steger

A Generic Timing Mechanism for Using the APPLES Gate-Level Accelerator in a Mixed-level Simulation Environment

Alexander Maili, Damian Dalton, Christian Steger

Institut für Technische Informatik (4480)

Publikation: Beitrag in Buch/Bericht/Konferenzband › Beitrag in einem Konferenzband › Begutachtung

Originalsprache	englisch
Titel	Integrated circuit and system design
Erscheinungsort	Berlin [u.a.]
Herausgeber (Verlag)	Springer
Seiten	799-808
Band	3254
ISBN (Print)	3-540-23095-5
Publikationsstatus	Veröffentlicht - 2004
Veranstaltung	International Workshop on Power and Timing Modeling, Optimization and Simulation - Santorini, Griechenland Dauer: 15 Sept. 2004 → 17 Sept. 2004

Publikationsreihe

Name	Lecture notes in computer science
Herausgeber (Verlag)	Springer

Konferenz

Konferenz	International Workshop on Power and Timing Modeling, Optimization and Simulation
Land/Gebiet	Griechenland
Ort	Santorini
Zeitraum	15/09/04 → 17/09/04

Hardware/Software-Codesign
Steger, C., Seifert, C., Stelzer, P., Fiala, G. & Basic, F.
1/01/95 → …
Projekt: Arbeitsgebiet

Dieses zitieren

A Generic Timing Mechanism for Using the APPLES Gate-Level Accelerator in a Mixed-level Simulation Environment. / Maili, Alexander; Dalton, Damian; Steger, Christian.
Integrated circuit and system design. Band 3254 Berlin [u.a.]: Springer, 2004. S. 799-808 (Lecture notes in computer science).

Publikation: Beitrag in Buch/Bericht/Konferenzband › Beitrag in einem Konferenzband › Begutachtung

Maili, A, Dalton, D & Steger, C 2004, A Generic Timing Mechanism for Using the APPLES Gate-Level Accelerator in a Mixed-level Simulation Environment. in Integrated circuit and system design. Bd. 3254, Lecture notes in computer science, Springer, Berlin [u.a.], S. 799-808, International Workshop on Power and Timing Modeling, Optimization and Simulation, Santorini, Griechenland, 15/09/04.

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AU - Maili, Alexander

AU - Dalton, Damian

AU - Steger, Christian

PY - 2004

Y1 - 2004

M3 - Conference paper

SN - 3-540-23095-5

VL - 3254

T3 - Lecture notes in computer science

SP - 799

EP - 808

BT - Integrated circuit and system design

PB - Springer

CY - Berlin [u.a.]

T2 - International Workshop on Power and Timing Modeling, Optimization and Simulation

Y2 - 15 September 2004 through 17 September 2004

ER -

A Generic Timing Mechanism for Using the APPLES Gate-Level Accelerator in a Mixed-level Simulation Environment

Publikationsreihe

Konferenz

Projekte

Hardware/Software-Codesign

Dieses zitieren