Security Improvement in Embedded Systems via an Efficient Hardware Bound Checking Architecture

Michael Georg Grasser; Eugen Brenner

Security Improvement in Embedded Systems via an Efficient Hardware Bound Checking Architecture

Michael Georg Grasser, Eugen Brenner

Institut für Technische Informatik (4480)

Publikation: Beitrag in Buch/Bericht/Konferenzband › Beitrag in einem Konferenzband › Begutachtung

Originalsprache	englisch
Titel	Proceedings of MoMM2006 & iiWAS2006 Workshops
Herausgeber (Verlag)	.
Seiten	379-388
Band	216
ISBN (Print)	3-85403-216-1
Publikationsstatus	Veröffentlicht - 2006
Veranstaltung	International SoC and MCSoC Design Workshop - Yogyakarta, Indonesien Dauer: 4 Dez. 2006 → 6 Dez. 2006

Publikationsreihe

Name	books@ocg.at

Konferenz

Konferenz	International SoC and MCSoC Design Workshop
Land/Gebiet	Indonesien
Ort	Yogyakarta
Zeitraum	4/12/06 → 6/12/06

Fields of Expertise

Information, Communication & Computing

Treatment code (Nähere Zuordnung)

Experimental
Review

SecureCPU - Improving Code-Security by Extension of CPU-Registers
Grasser, M. G. & Brenner, E.
10/03/06 → 31/01/08
Projekt: Forschungsprojekt

Dieses zitieren

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AU - Brenner, Eugen

PY - 2006

Y1 - 2006

M3 - Conference paper

SN - 3-85403-216-1

VL - 216

T3 - books@ocg.at

SP - 379

EP - 388

BT - Proceedings of MoMM2006 & iiWAS2006 Workshops

PB - .

T2 - International SoC and MCSoC Design Workshop

Y2 - 4 December 2006 through 6 December 2006

ER -

Security Improvement in Embedded Systems via an Efficient Hardware Bound Checking Architecture

Publikationsreihe

Konferenz

Fields of Expertise

Treatment code (Nähere Zuordnung)

Projekte

SecureCPU - Improving Code-Security by Extension of CPU-Registers

Dieses zitieren