DescriptionThis Tutorial describes the principle and development of a clocked comparator respectively latched comparator circuit using MOSFETs, starting from a simple latch structure and subsequently adding input, clocking and reset circuitry. In the end a flip-flop like structure, using inverters is obtained. These clocked comparator circuits are operated in two phases, whereas the first phase is the reset phase and in the second phase a definite decision is made through positive feedback. The comparator result is saved until the next reset phase is active. The explanations are illustrated by comparing the circuit with a seesaw.
|Period||25 May 2020|
|Held at||Institute of Electronics (4390)|
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