Abstract
Higher integration of Transient Voltage Suppression (TVS) functionality into ASIC I/O cells implies lower system costs. But as the ESD pulse is directed deeper into the system, migrating the TVS clamping function from the periphery of the system to a central ASIC may actually reduce the system's ESD robustness. ESD current reconstruction scanning can be used to trace the current path on a PCB, and possibly within an IC. The article compares the current spreading during and ESD for different ESD protection methods.
Original language | English |
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Title of host publication | Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010, EOS/ESD 2010 |
Publication status | Published - 24 Dec 2010 |
Externally published | Yes |
Event | 32nd Annual Electrical Overstress/Electrostatic Discharge Symposium: EOS/ESD 2010 - Reno, United States Duration: 3 Oct 2010 → 8 Oct 2010 |
Publication series
Name | Electrical Overstress/Electrostatic Discharge Symposium Proceedings |
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ISSN (Print) | 0739-5159 |
Conference
Conference | 32nd Annual Electrical Overstress/Electrostatic Discharge Symposium |
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Country/Territory | United States |
City | Reno |
Period | 3/10/10 → 8/10/10 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering