Efficient Pairings and ECC for Embedded Systems

Thomas Unterluggauer; Erich Wenger

doi:10.1007/978-3-662-44709-3_17

Efficient Pairings and ECC for Embedded Systems

Thomas Unterluggauer, Erich Wenger

Institute of Applied Information Processing and Communications (7050)

Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review

Abstract

The research on pairing-based cryptography brought forth a wide range of protocols interesting for future embedded applications. One significant obstacle for the widespread deployment of pairing-based cryptography are its tremendous hardware and software requirements. In this paper we present three side-channel protected hardware/software designs for pairing-based cryptography yet small and practically fast: our plain ARM Cortex-M0+-based design computes a pairing in less than one second. The utilization of a multiply-accumulate instruction-set extension or a light-weight drop-in hardware accelerator that is placed between CPU and data memory improves runtime up to six times. With a 10.1 kGE large drop-in module and a 49 kGE large platform, our design is one of the smallest pairing designs available. Its very practical runtime of 162 ms for one pairing on a 254-bit BN curve and its reusability for other elliptic-curve based crypto systems offer a great solution for every microprocessor-based embedded application.

Original language	English
Title of host publication	Cryptographic Hardware and Embedded Systems - CHES 2014
Subtitle of host publication	16th International Workshop, Busan, Korea, September 23 - September 26, 2014, Proceedings.
Place of Publication	Berlin; Heidelberg
Publisher	Springer
Pages	298-315
ISBN (Print)	978-3-662-44708-6
DOIs	https://doi.org/10.1007/978-3-662-44709-3_17
Publication status	Published - 2014
Event	2014 Workshop on Cryptographic Hardware and Embedded Systems: CHES 2014 - Busan, Korea, Republic of Duration: 23 Sept 2014 → 26 Sept 2014

Publication series

Name	Lecture Notes in Computer Science
Publisher	Springer
Volume	8731

Conference

Conference	2014 Workshop on Cryptographic Hardware and Embedded Systems
Abbreviated title	CHES 2014
Country/Territory	Korea, Republic of
City	Busan
Period	23/09/14 → 26/09/14

Fields of Expertise

Information, Communication & Computing

Treatment code (Nähere Zuordnung)

Application

Access to Document

10.1007/978-3-662-44709-3_17

2014_ches_pairing_impl.pdfAccepted author manuscript, 693 KB

Matthew - Multi-entity-security using active Transmission Technology for improved - Handling of Exportable security credentials Without privacy restrictions
Hanser, C., Wenger, E., Korak, T., Groß, H., Mangard, S. & Unterluggauer, T.
1/11/13 → 31/10/16
Project: Research project
NewP@ass - New verification & valdidation methods enabling widespread use of Privacy and @nonymity in electronically secured systems
Röck, F., Unterluggauer, T., Könighofer, R., Mangard, S., Wenger, E., Spreitzer, R. C., Mendel, F., Schmidt, J. & Bloem, R.
1/05/12 → 31/05/15
Project: Research project
VLSI Design
Medwed, M., Wenger, E., Aigner, M. J., Posch, K., Hutter, M., Kirschbaum, M., Schmidt, J., Posch, R., Dominikus, S., Szekely, A., Feldhofer, M. & Plos, T.
1/01/95 → 15/07/19
Project: Research area

Cite this

Efficient Pairings and ECC for Embedded Systems. / Unterluggauer, Thomas; Wenger, Erich.
Cryptographic Hardware and Embedded Systems - CHES 2014: 16th International Workshop, Busan, Korea, September 23 - September 26, 2014, Proceedings.. Berlin; Heidelberg: Springer, 2014. p. 298-315 (Lecture Notes in Computer Science; Vol. 8731).

Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review

Unterluggauer, T & Wenger, E 2014, Efficient Pairings and ECC for Embedded Systems. in Cryptographic Hardware and Embedded Systems - CHES 2014: 16th International Workshop, Busan, Korea, September 23 - September 26, 2014, Proceedings.. Lecture Notes in Computer Science, vol. 8731, Springer, Berlin; Heidelberg, pp. 298-315, 2014 Workshop on Cryptographic Hardware and Embedded Systems, Busan, Korea, Republic of, 23/09/14. https://doi.org/10.1007/978-3-662-44709-3_17

@inproceedings{e453f7f3210f443eb15eb4596dbdf25c,

title = "Efficient Pairings and ECC for Embedded Systems",

abstract = "The research on pairing-based cryptography brought forth a wide range of protocols interesting for future embedded applications. One significant obstacle for the widespread deployment of pairing-based cryptography are its tremendous hardware and software requirements. In this paper we present three side-channel protected hardware/software designs for pairing-based cryptography yet small and practically fast: our plain ARM Cortex-M0+-based design computes a pairing in less than one second. The utilization of a multiply-accumulate instruction-set extension or a light-weight drop-in hardware accelerator that is placed between CPU and data memory improves runtime up to six times. With a 10.1 kGE large drop-in module and a 49 kGE large platform, our design is one of the smallest pairing designs available. Its very practical runtime of 162 ms for one pairing on a 254-bit BN curve and its reusability for other elliptic-curve based crypto systems offer a great solution for every microprocessor-based embedded application.",

author = "Thomas Unterluggauer and Erich Wenger",

year = "2014",

doi = "10.1007/978-3-662-44709-3_17",

language = "English",

isbn = "978-3-662-44708-6",

series = "Lecture Notes in Computer Science",

publisher = "Springer",

pages = "298--315",

booktitle = "Cryptographic Hardware and Embedded Systems - CHES 2014",

note = "2014 Workshop on Cryptographic Hardware and Embedded Systems : CHES 2014, CHES 2014 ; Conference date: 23-09-2014 Through 26-09-2014",

}

TY - GEN

T1 - Efficient Pairings and ECC for Embedded Systems

AU - Unterluggauer, Thomas

AU - Wenger, Erich

PY - 2014

Y1 - 2014

N2 - The research on pairing-based cryptography brought forth a wide range of protocols interesting for future embedded applications. One significant obstacle for the widespread deployment of pairing-based cryptography are its tremendous hardware and software requirements. In this paper we present three side-channel protected hardware/software designs for pairing-based cryptography yet small and practically fast: our plain ARM Cortex-M0+-based design computes a pairing in less than one second. The utilization of a multiply-accumulate instruction-set extension or a light-weight drop-in hardware accelerator that is placed between CPU and data memory improves runtime up to six times. With a 10.1 kGE large drop-in module and a 49 kGE large platform, our design is one of the smallest pairing designs available. Its very practical runtime of 162 ms for one pairing on a 254-bit BN curve and its reusability for other elliptic-curve based crypto systems offer a great solution for every microprocessor-based embedded application.

AB - The research on pairing-based cryptography brought forth a wide range of protocols interesting for future embedded applications. One significant obstacle for the widespread deployment of pairing-based cryptography are its tremendous hardware and software requirements. In this paper we present three side-channel protected hardware/software designs for pairing-based cryptography yet small and practically fast: our plain ARM Cortex-M0+-based design computes a pairing in less than one second. The utilization of a multiply-accumulate instruction-set extension or a light-weight drop-in hardware accelerator that is placed between CPU and data memory improves runtime up to six times. With a 10.1 kGE large drop-in module and a 49 kGE large platform, our design is one of the smallest pairing designs available. Its very practical runtime of 162 ms for one pairing on a 254-bit BN curve and its reusability for other elliptic-curve based crypto systems offer a great solution for every microprocessor-based embedded application.

U2 - 10.1007/978-3-662-44709-3_17

DO - 10.1007/978-3-662-44709-3_17

M3 - Conference paper

SN - 978-3-662-44708-6

T3 - Lecture Notes in Computer Science

SP - 298

EP - 315

BT - Cryptographic Hardware and Embedded Systems - CHES 2014

PB - Springer

CY - Berlin; Heidelberg

T2 - 2014 Workshop on Cryptographic Hardware and Embedded Systems

Y2 - 23 September 2014 through 26 September 2014

ER -

Efficient Pairings and ECC for Embedded Systems

Abstract

Publication series

Conference

Fields of Expertise

Treatment code (Nähere Zuordnung)

Access to Document

Fingerprint

Projects

Matthew - Multi-entity-security using active Transmission Technology for improved - Handling of Exportable security credentials Without privacy restrictions

NewP@ass - New verification & valdidation methods enabling widespread use of Privacy and @nonymity in electronically secured systems

VLSI Design

Cite this