Masked Dual-Rail Pre-Charge Logic: DPA-Resistance without Routing Constraints

Thomas Popp, Stefan Mangard

Research output: Chapter in Book/Report/Conference proceeding › Conference paper › peer-review

Original languageEnglish
Title of host publicationCryptographic Hardware and Embedded Systems - CHES 2005
Place of PublicationBerlin
PublisherSpringer
Pages172-186
Volume3659
ISBN (Print)3-540-28474-5
Publication statusPublished - 2005
EventCHES - Edinburgh, United Kingdom
Duration: 29 Aug 2005 → 1 Sept 2005

Publication series

NameLecture Notes in Computer Science (LNCS)
PublisherSpringer

Conference

ConferenceCHES
Country/TerritoryUnited Kingdom
CityEdinburgh
Period29/08/05 → 1/09/05

Other files and links

  • EU - SCARD - Side Channel Analysis Resistant Design Flow

    Mangard, S., Herbst, C., Wolkerstorfer, J., Oswald, M. E., Popp, T., Tillich, S., Aigner, M. J. & Schmaranz, K.

    1/01/04 → 30/06/06

    Project: Research project

  • IMPA Lab

    Posch, R., Rijmen, V., Posch, K., Kirschbaum, M., Schmidt, J., Schläffer, M., Szekely, A., Medwed, M., Plos, T., Peßl, P., Aigner, M. J., Wenger, E., Dominikus, S., Feldhofer, M., Hutter, M. & Oswald, M. E.

    1/10/99 → 15/07/19

    Project: Research area

  • VLSI Design

    Medwed, M., Wenger, E., Aigner, M. J., Posch, K., Hutter, M., Kirschbaum, M., Schmidt, J., Posch, R., Dominikus, S., Szekely, A., Feldhofer, M. & Plos, T.

    1/01/95 → 15/07/19

    Project: Research area

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