Monitoring of parameter stability of SiC MOSFETs in real application tests

M. Sievers*, B. Findenig, M. Glavanovics, T. Aichinger, B. Deutschmann

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review


Reliability testing of Si power semiconductors has had a long history and has resulted in a good predictability of standard degradation-mechanism tests such as power cycling. To enable a rapid adoption of SiC MOSFETs into the mass market, application stress tests have also been carried out. In order to validate robustness, and assess end-of-life behavior, it is necessary to monitor performance-relevant device parameters throughout the tests. Application stress tests, however, are notorious for imposing limitations on the type of measurements that can be integrated into the test. Here, a modular system for parallel application stress tests is presented. This work also investigates how well one can carry out characterization measurements directly on the application test board. A discussion on the challenges and reasons for the selected solution are presented. The last part of this article presents the results of a bias-temperature instability investigation to demonstrate the feasibility of the proposed solution.

Original languageEnglish
Article number113731
Number of pages6
JournalMicroelectronics Reliability
Publication statusPublished - Nov 2020


  • Application stress testing
  • Bias temperature instability
  • Condition monitoring
  • Degradation monitoring
  • Device characterization

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Safety, Risk, Reliability and Quality
  • Condensed Matter Physics
  • Surfaces, Coatings and Films
  • Electrical and Electronic Engineering

Fields of Expertise

  • Information, Communication & Computing

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