Projects per year
Abstract
Formal specifications play an increasingly important role in
system design-flows. Yet, they are not always easy to deal with. In this
paper we present RATSY, a successor of the Requirements Analysis
Tool RAT. RATSY extends RAT in several ways. First, it includes a
new graphical user interface to specify system properties as simple Büchi
word automata. Second, it can help debug incorrect specifications by
means of a game-based approach. Third, it allows correct-by-construction
synthesis of systems from their temporal properties. These new features
and their seamless integration assist in property-based design processes.
system design-flows. Yet, they are not always easy to deal with. In this
paper we present RATSY, a successor of the Requirements Analysis
Tool RAT. RATSY extends RAT in several ways. First, it includes a
new graphical user interface to specify system properties as simple Büchi
word automata. Second, it can help debug incorrect specifications by
means of a game-based approach. Third, it allows correct-by-construction
synthesis of systems from their temporal properties. These new features
and their seamless integration assist in property-based design processes.
Original language | English |
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Title of host publication | Computer Aided Verification |
Editors | Tayssir Toulli |
Publisher | Springer |
Pages | 425-429 |
Volume | 6174 |
ISBN (Print) | 978-3-642-14294-9 |
DOIs | |
Publication status | Published - 2010 |
Event | 22nd International Conference on Computer Aided Verification (CAV 2010) - Edinburgh, United Kingdom Duration: 15 Jul 2010 → 19 Jul 2010 |
Publication series
Name | Lecture Notes in Computer Science |
---|---|
Volume | 6174 |
Conference
Conference | 22nd International Conference on Computer Aided Verification (CAV 2010) |
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Country/Territory | United Kingdom |
City | Edinburgh |
Period | 15/07/10 → 19/07/10 |
Fields of Expertise
- Information, Communication & Computing
Treatment code (Nähere Zuordnung)
- Application
Projects
- 3 Finished
-
EU - DIAMOND - Diagnosis, Error Modelling and Correction for Reliable Systems Design
Khalimov, A., Greimel, K., Jacobs, S., Hofferek, G., Könighofer, B., Könighofer, R. & Bloem, R.
1/01/10 → 31/12/12
Project: Research project
-
Formal Methods for Design & Verification
Jacobs, S., Bloem, R., Könighofer, R., Könighofer, B., Khalimov, A., Hofferek, G. & Braud-Santoni, N.
1/02/08 → 15/07/19
Project: Research area
-
EU - COCONUT - A correct-by-construction workbench for design and verification of embedded systems
Könighofer, R., Hofferek, G., Greimel, K. & Bloem, R.
1/01/08 → 30/06/10
Project: Research project