Stability of Grid-connected Photovoltaic Inverters During and After Low Voltage Ride Through

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In the practical application of PV grid-connected inverters, the failure of low voltage ride through has repeatedly occurred. Even if inverter model passed the grid compliance testing in test laboratories, multiple cases been observed where inverters lost stability during voltage dips in practice. The reason for this behavior were stability problems of the PLL (phase-locked-loop) circuit implemented in the converter control. This circuit is needed to set the phase reference for the inverter control. In this article, a detailed mathematical modeling of the inverter phase-locked loop system is carried out and analyzed. Based on the second order nonlinear differential equation, an intuitive graphical method is used to analyze the system. This analysis concludes that during and after low voltage ride through, stability of inverter depends on interaction of several control loops in the inverter. This interaction can lead to instability after fault clearing, since the phase-locked loop has left its area of stability. Through a power hardware-in-the-loop test system, this article reproduces this phenomenon in laboratory.
Original languageEnglish
Publication statusPublished - 16 Oct 2018
Event8th Solar Integration Workshop: International Workshop on Integration of Solar into Power Systems - KTH Royal Institute of Technology in Stockholm, Stockholm, Sweden
Duration: 16 Oct 201817 Oct 2018


Workshop8th Solar Integration Workshop
Internet address


  • grid-connected inverters
  • phase-locked loop
  • low voltage ride through
  • power hardware-in-the-loop
  • PV inverter stability

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