Studies of Ionizing Radiation Effects in Nano-Scale CMOS (SIRENS)

Research output: Contribution to conferencePoster


High energy physics experiments are creating an increasing demand for integrated circuits (ICs) that can reliably work at higher frequencies, with smaller signal levels and under the influence of large doses of high energy radiation. A leading example of this trend is the next upgrade of large hadron collider (LHC) at Conseil Européen pour la Recherche Nucléaire (CERN). The integrated circuit technologies used in applications with high energy radiation environment have to be carefully selected and characterized both at single transistor and circuit level. The focus of this project is to examine total ionizing dose (TID) influence on 28 nm and 40 nm CMOS "high-dielectric-constant-metal-gate" (high-K) technology nodes and establish reliable models for DC, 1/f noise and Random Telegraph Noise (RTN) behavior under different operating conditions.
Original languageEnglish
Publication statusPublished - 22 Apr 2022
EventAdvanced Materials Poster Day 2022: AMD 2022 - TU Graz, Graz, Austria
Duration: 22 Apr 2022 → …


ConferenceAdvanced Materials Poster Day 2022
Abbreviated titleAMD 2022
Period22/04/22 → …


  • Radiation Hardness
  • integrated circuit (IC) design
  • Semiconductor Devices
  • Reliability
  • Total ionizing dose (TID) radiation
  • 1/f noise
  • Random telegraph noise
  • Analog-Mixed Signal
  • Nanoscale CMOS

Fields of Expertise

  • Advanced Materials Science

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