The Evolution of Transient-Execution Attacks

Claudio Alberto Canella, Khaled N. Khasawneh, Daniel Gruß

Research output: Chapter in Book/Report/Conference proceedingConference paper


Historically, non-architectural state was considered non-observable. Side-channel attacks, in particular on caches, already showed that this is not entirely correct and meta-information, such as the cache state, can be extracted. Transient-execution attacks emerged when multiple groups discovered the exploitability of speculative execution and, simultaneously, the exploitability of deferred permission checks in modern out-of-order processors. These attacks are called transient as they exploit that the processor first executes operations that are then reverted as if they were never executed. However, on the microarchitectural level, these operations and their effects can be observed. While side-channel attacks enable and exploit direct access to meta-data from other security domains,
transient-execution attacks enable and exploit direct access to actual data from other security domains. In this paper, we show how the transient-execution landscape evolved since the initial discoveries. We show that the understanding and systematic view of the field has advanced and now facilitate the discovery of new attack variants.
Original languageEnglish
Title of host publicationGLSVLSI 2020 - Proceedings of the 2020 Great Lakes Symposium on VLSI
Number of pages6
ISBN (Electronic)9781450379441
Publication statusPublished - 7 Sept 2020
EventGLSVLSI 2020: 30th ACM Great Lakes Symposium on VLSI - Virtuell, China
Duration: 8 Sept 202011 Sept 2020

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI


ConferenceGLSVLSI 2020


  • transient execution
  • Meltdown
  • Spectre
  • LVI
  • Transient execution

ASJC Scopus subject areas

  • Engineering(all)


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